1. Field of the Invention
This invention relates generally to state retained latches, and more particularly to a technique for preventing regulated supply undershoot in state retained latches of a leakage controlled system, using a low drop-out regulator.
2. Description of the Prior Art
Dynamic voltage and frequency scaling (DVFS) is frequently employed to reduce power consumption in state retained latches in active mode, and to reduce leakage currents in sleep mode. In sleep mode, the drain-source voltage of the retained latch transistors can be lowered to reduce the electric fields and hence reduce the leakage. The associated system/chip may however, not be completely off, and any related rudimentary logic, latch data and static random access memory (SRAM) need to retain their values. Any undershoot transient in the dynamically varied voltage therefore, may cause un-reliable state retention, and therefore is undesirable. Sense amplifier circuit techniques are known for preventing regulated supply undershoot in state retained latches of a leakage controlled system. Such techniques are disadvantageous in that they consume undesirable amounts of power, consume undesirable amounts of die are, and are often difficult to implement.
In view of the foregoing, a need exists for a technique for preventing regulated supply undershoot in state retained latches of a leakage controlled system without use of sense amplifier circuits.